1. Field of the Invention
This invention relates to a pressure contact semiconductor device and, more specifically, to its structure, in which a semiconductor substrate is coupled with a metal post having high thermal conductivity and high electrical conductivity through a metal plate having a thermal expansion coefficient, which is close to that of the semiconductor substrate.
2. Description of the Related Art
A semiconductor device, in particular a high power semiconductor, device requires a structure permitting it the conduction of heat and electricity with a high efficiency. The pressure contact type of semiconductor device structure is a structure by which a metal electrode plate is pushed towards an electrode film formed on a semiconductor substrate, which plate conducts heat and electricity, and is excellent in stability against thermal cycles. Further, it has an advantage that the semiconductor substrate can be easily exchanged. The pressure contact type structure is utilized principally for power semiconductor devices, such as power transistors, thyristors, gate turn off (GTO) thyristors, etc. In order that the semiconductor substrate is not stressed by thermal cycles, it is preferable that the thermal expansion coefficient of the metal element, which is brought directly into contact with the surface of the semiconductor body (including the surface of the electrode film) is as close as possible to that of the semiconductor body. However such a metal cannot be said to have sufficiently high electrical conductivity and thermal conductivity. Therefore a structure, by which compressive force is applied to a metal post superposed on the metal electrode plate made of a material having a thermal expansion coefficient close to that of the semiconductor substrate, has been proposed. The positional relation between, different superposed components becomes fixed by accordingly applying compressive force thereto, and using an insulating ring, etc. made of tetrafluoroethylene (teflon), etc. for holding the superposed components safely also before the application of compressive force.
According to JP Utility Model A Sho No 57-69240 assigned to one of the assignees of this application, it discloses protecting the end surfaces of a semiconductor substrate by pouring silicone resin at the end portions of the semiconductor substrate after having engaged an insulating ring therewith. Tetrafluoroethylene and silicone resin are excellent substance for passivation and protection, which can bear such temperatures around storage temperature of the semiconductor device.
For example U.S. Pat. No. 4,500,903 assigned to Hitachi, Ltd., which is one of the assignees of this application, discloses that a number of elongated emitters are arranged in the radial direction in a ring shape, that several such rings are disposed from the central portion to the periphery on the surface of the semiconductor body to obtain a multi-ring structure and that the length of emitter strips is different for different rings in order to control a high current with a high efficiency.
Further, for example, U.S. Pat. No. 3,134,074 assigned to Hitachi Ltd., which is one of the assignees of this application, discloses a structure, by which, in such a multi-ring emitter structure, gate electrode films are disposed between two adjacent emitter rings, which films are brought into contact with gate electrode rings.
Such a gate electrode ring should be positioned precisely on a predetermined portion of the gate electrode. If it is in contact with the cathode-emitter, it gives rise to short circuit and the semiconductor device loses its control function. Even if it is not in contact with the cathode, when it is not in contact with the predetermined portion of the gate electrode, non-uniformity, local concentration of electric current, etc. can result.